We are proud to announce the birth of the Free Silicon Foundation (https://f-si.org)!
We organize a conference in Paris, March 14-16 2019, to promote:
1. Free and Open Source (FOS) CAD tools for designing #VLSI circuits
2. the sharing of hardware designs
3. common standards
4. the freedom of users in the context of #silicon technology
Program and submissions:
@fsi I'm glad you exist, we need trustworthy FOSH computation.
Are there recordings of the first conference?
Also: Localized RISCV fabbing when?
Last year's conference was a smaller event (one day only) and the slides are available here:
https://www-soc.lip6.fr/events/pastevents/2018/ . For this year, recordings are not planned yet.
We contacted foundries too - let's see how far we can go in the direction of opening the PDKs: We have already fabricated RISCV chips, but various NDAs did not allow to publish layouts. We are working to change that. At FSiC there will be a session about this too.
Do foundries limit you in using self-created PDKs for basic elements?
Do they claim ownership of self created layouts when their design rules and layer definitions are used?
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